ASIC/FPGA Thought Papers |
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| Evaluating and Improving Emulator Performance |
Abstract
With functional verification becoming the largest task in the development of an ASIC or large FPGA, many engineers are looking at simulation acceleration or emulation as a way to speed development. Engineers today can choose from a number of different platforms.
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| Retargetable Transaction-Based System Level Verification |
Abstract
Functional verification has become the dominant resource issue in developing SoCs. The increasing gate capacity of integrated circuits and the corresponding ability to place an entire system, complete with one or more software-controlled processors, on a single chip has put increasing pressure on conventional simulation as the sole means of validating complete chip functionality.
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